mirror of
https://github.com/gchq/CyberChef.git
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377 lines
11 KiB
JavaScript
377 lines
11 KiB
JavaScript
/**
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* Disassemble ARM tests.
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*
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* @author MedjedThomasXM
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*
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* @copyright Crown Copyright 2024
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* @license Apache-2.0
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*/
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import TestRegister from "../../lib/TestRegister.mjs";
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TestRegister.addTests([
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// ==================== ARM32 TESTS ====================
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{
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name: "Disassemble ARM: ARM32 NOP (mov r0, r0)",
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input: "00 00 a0 e1",
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expectedMatch: /mov\s+r0,\s*r0/,
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recipeConfig: [
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{
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op: "Disassemble ARM",
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args: ["ARM (32-bit)", "ARM", "Little Endian", 0, true, true],
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},
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],
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},
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{
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name: "Disassemble ARM: ARM32 bx lr",
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input: "1e ff 2f e1",
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expectedMatch: /bx\s+lr/,
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recipeConfig: [
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{
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op: "Disassemble ARM",
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args: ["ARM (32-bit)", "ARM", "Little Endian", 0, true, true],
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},
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],
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},
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{
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name: "Disassemble ARM: ARM32 push {fp, lr}",
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input: "00 48 2d e9",
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expectedMatch: /push\s+\{fp,\s*lr\}/,
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recipeConfig: [
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{
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op: "Disassemble ARM",
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args: ["ARM (32-bit)", "ARM", "Little Endian", 0, true, true],
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},
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],
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},
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{
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name: "Disassemble ARM: ARM32 add fp, sp, #4",
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input: "04 b0 8d e2",
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expectedMatch: /add\s+fp,\s*sp/,
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recipeConfig: [
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{
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op: "Disassemble ARM",
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args: ["ARM (32-bit)", "ARM", "Little Endian", 0, true, true],
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},
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],
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},
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{
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name: "Disassemble ARM: ARM32 ldr r0, [r1]",
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input: "00 00 91 e5",
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expectedMatch: /ldr\s+r0,\s*\[r1\]/,
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recipeConfig: [
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{
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op: "Disassemble ARM",
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args: ["ARM (32-bit)", "ARM", "Little Endian", 0, true, true],
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},
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],
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},
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{
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name: "Disassemble ARM: ARM32 str r0, [r1]",
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input: "00 00 81 e5",
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expectedMatch: /str\s+r0,\s*\[r1\]/,
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recipeConfig: [
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{
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op: "Disassemble ARM",
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args: ["ARM (32-bit)", "ARM", "Little Endian", 0, true, true],
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},
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],
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},
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{
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name: "Disassemble ARM: ARM32 bl (branch link)",
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input: "00 00 00 eb",
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expectedMatch: /bl\s+/,
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recipeConfig: [
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{
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op: "Disassemble ARM",
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args: ["ARM (32-bit)", "ARM", "Little Endian", 0, true, true],
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},
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],
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},
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{
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name: "Disassemble ARM: ARM32 mul r0, r1, r2",
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input: "91 02 00 e0",
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expectedMatch: /mul\s+r0,\s*r1,\s*r2/,
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recipeConfig: [
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{
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op: "Disassemble ARM",
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args: ["ARM (32-bit)", "ARM", "Little Endian", 0, true, true],
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},
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],
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},
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// ==================== ARM32 THUMB TESTS ====================
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{
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name: "Disassemble ARM: Thumb mov r0, r0",
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input: "00 46",
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expectedMatch: /mov\s+r0,\s*r0/,
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recipeConfig: [
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{
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op: "Disassemble ARM",
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args: ["ARM (32-bit)", "Thumb", "Little Endian", 0, true, true],
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},
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],
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},
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{
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name: "Disassemble ARM: Thumb bx lr",
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input: "70 47",
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expectedMatch: /bx\s+lr/,
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recipeConfig: [
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{
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op: "Disassemble ARM",
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args: ["ARM (32-bit)", "Thumb", "Little Endian", 0, true, true],
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},
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],
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},
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{
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name: "Disassemble ARM: Thumb push {r4, lr}",
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input: "10 b5",
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expectedMatch: /push\s+\{r4,\s*lr\}/,
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recipeConfig: [
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{
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op: "Disassemble ARM",
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args: ["ARM (32-bit)", "Thumb", "Little Endian", 0, true, true],
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},
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],
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},
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{
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name: "Disassemble ARM: Thumb pop {r4, pc}",
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input: "10 bd",
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expectedMatch: /pop\s+\{r4,\s*pc\}/,
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recipeConfig: [
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{
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op: "Disassemble ARM",
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args: ["ARM (32-bit)", "Thumb", "Little Endian", 0, true, true],
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},
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],
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},
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// ==================== ARM64 TESTS ====================
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{
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name: "Disassemble ARM: ARM64 ret",
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input: "c0 03 5f d6",
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expectedMatch: /ret/,
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recipeConfig: [
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{
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op: "Disassemble ARM",
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args: ["ARM64 (AArch64)", "ARM", "Little Endian", 0, true, true],
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},
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],
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},
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{
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name: "Disassemble ARM: ARM64 mov x0, #0",
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input: "00 00 80 d2",
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expectedMatch: /mov[z]?\s+x0,\s*#0/,
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recipeConfig: [
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{
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op: "Disassemble ARM",
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args: ["ARM64 (AArch64)", "ARM", "Little Endian", 0, true, true],
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},
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],
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},
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{
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name: "Disassemble ARM: ARM64 stp x29, x30, [sp, #-16]!",
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input: "fd 7b bf a9",
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expectedMatch: /stp\s+x29,\s*x30,\s*\[sp/,
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recipeConfig: [
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{
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op: "Disassemble ARM",
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args: ["ARM64 (AArch64)", "ARM", "Little Endian", 0, true, true],
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},
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],
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},
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{
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name: "Disassemble ARM: ARM64 ldp x29, x30, [sp], #16",
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input: "fd 7b c1 a8",
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expectedMatch: /ldp\s+x29,\s*x30,\s*\[sp\]/,
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recipeConfig: [
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{
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op: "Disassemble ARM",
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args: ["ARM64 (AArch64)", "ARM", "Little Endian", 0, true, true],
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},
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],
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},
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{
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name: "Disassemble ARM: ARM64 add x0, x1, x2",
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input: "20 00 02 8b",
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expectedMatch: /add\s+x0,\s*x1,\s*x2/,
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recipeConfig: [
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{
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op: "Disassemble ARM",
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args: ["ARM64 (AArch64)", "ARM", "Little Endian", 0, true, true],
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},
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],
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},
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{
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name: "Disassemble ARM: ARM64 sub x0, x1, x2",
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input: "20 00 02 cb",
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expectedMatch: /sub\s+x0,\s*x1,\s*x2/,
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recipeConfig: [
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{
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op: "Disassemble ARM",
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args: ["ARM64 (AArch64)", "ARM", "Little Endian", 0, true, true],
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},
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],
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},
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{
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name: "Disassemble ARM: ARM64 mul x0, x1, x2",
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input: "20 7c 02 9b",
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expectedMatch: /mul\s+x0,\s*x1,\s*x2/,
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recipeConfig: [
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{
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op: "Disassemble ARM",
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args: ["ARM64 (AArch64)", "ARM", "Little Endian", 0, true, true],
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},
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],
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},
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{
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name: "Disassemble ARM: ARM64 ldr x0, [x1]",
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input: "20 00 40 f9",
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expectedMatch: /ldr\s+x0,\s*\[x1\]/,
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recipeConfig: [
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{
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op: "Disassemble ARM",
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args: ["ARM64 (AArch64)", "ARM", "Little Endian", 0, true, true],
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},
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],
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},
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{
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name: "Disassemble ARM: ARM64 str x0, [x1]",
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input: "20 00 00 f9",
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expectedMatch: /str\s+x0,\s*\[x1\]/,
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recipeConfig: [
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{
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op: "Disassemble ARM",
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args: ["ARM64 (AArch64)", "ARM", "Little Endian", 0, true, true],
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},
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],
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},
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{
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name: "Disassemble ARM: ARM64 bl (branch link)",
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input: "00 00 00 94",
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expectedMatch: /bl\s+/,
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recipeConfig: [
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{
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op: "Disassemble ARM",
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args: ["ARM64 (AArch64)", "ARM", "Little Endian", 0, true, true],
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},
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],
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},
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{
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name: "Disassemble ARM: ARM64 cbz x0",
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input: "00 00 00 b4",
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expectedMatch: /cbz\s+x0/,
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recipeConfig: [
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{
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op: "Disassemble ARM",
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args: ["ARM64 (AArch64)", "ARM", "Little Endian", 0, true, true],
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},
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],
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},
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{
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name: "Disassemble ARM: ARM64 cbnz x0",
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input: "00 00 00 b5",
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expectedMatch: /cbnz\s+x0/,
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recipeConfig: [
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{
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op: "Disassemble ARM",
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args: ["ARM64 (AArch64)", "ARM", "Little Endian", 0, true, true],
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},
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],
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},
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{
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name: "Disassemble ARM: ARM64 sub sp, sp, #0x20",
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input: "ff 83 00 d1",
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expectedMatch: /sub\s+sp,\s*sp/,
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recipeConfig: [
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{
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op: "Disassemble ARM",
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args: ["ARM64 (AArch64)", "ARM", "Little Endian", 0, true, true],
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},
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],
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},
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{
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name: "Disassemble ARM: ARM64 add sp, sp, #0x20",
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input: "ff 83 00 91",
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expectedMatch: /add\s+sp,\s*sp/,
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recipeConfig: [
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{
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op: "Disassemble ARM",
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args: ["ARM64 (AArch64)", "ARM", "Little Endian", 0, true, true],
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},
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],
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},
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// ==================== MULTI-INSTRUCTION TESTS ====================
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{
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name: "Disassemble ARM: ARM32 multiple instructions",
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input: "00 48 2d e9 04 b0 8d e2 00 00 a0 e1 00 88 bd e8",
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expectedMatch: /push.*\n.*add.*\n.*mov.*\n.*pop/s,
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recipeConfig: [
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{
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op: "Disassemble ARM",
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args: ["ARM (32-bit)", "ARM", "Little Endian", 0, true, true],
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},
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],
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},
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{
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name: "Disassemble ARM: ARM64 function prologue/epilogue",
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input: "fd 7b bf a9 fd 03 00 91 00 00 80 52 fd 7b c1 a8 c0 03 5f d6",
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expectedMatch: /stp.*\n.*mov.*\n.*mov.*\n.*ldp.*\n.*ret/s,
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recipeConfig: [
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{
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op: "Disassemble ARM",
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args: ["ARM64 (AArch64)", "ARM", "Little Endian", 0, true, true],
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},
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],
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},
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// ==================== ADDRESS TESTS ====================
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{
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name: "Disassemble ARM: ARM64 with start address 0x1000",
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input: "c0 03 5f d6",
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expectedMatch: /0x00001000/,
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recipeConfig: [
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{
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op: "Disassemble ARM",
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args: ["ARM64 (AArch64)", "ARM", "Little Endian", 4096, true, true],
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},
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],
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},
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{
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name: "Disassemble ARM: ARM32 with start address 0x8000",
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input: "00 00 a0 e1",
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expectedMatch: /0x00008000/,
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recipeConfig: [
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{
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op: "Disassemble ARM",
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args: ["ARM (32-bit)", "ARM", "Little Endian", 32768, true, true],
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},
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],
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},
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// ==================== ENDIANNESS TESTS ====================
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{
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name: "Disassemble ARM: ARM32 Big Endian",
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input: "e1 a0 00 00",
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expectedMatch: /mov\s+r0,\s*r0/,
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recipeConfig: [
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{
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op: "Disassemble ARM",
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args: ["ARM (32-bit)", "ARM", "Big Endian", 0, true, true],
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},
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],
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},
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// ==================== EDGE CASES ====================
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{
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name: "Disassemble ARM: Empty input",
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input: "",
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expectedOutput: "",
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recipeConfig: [
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{
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op: "Disassemble ARM",
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args: ["ARM64 (AArch64)", "ARM", "Little Endian", 0, true, true],
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},
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],
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},
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]);
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